Digital Logic

These topics build foundation for coming chapters. Become very familiar with base conversion and complements. Also, parity bits checking is highly important for exam.

De Morgan's Law and NAND/NOR gate as universal gates are the most important topic from here. They are easy and repeatedly asked. IC terms are sometime asked in short notes type question.

K-Map is very important. Spend as much time you can practising this. Watch all videos of this chapter very carefully. Most students make mistakes in Dont Care Conditions.

Here you will be asked to make several circuit designs like Adder, Subtractor etc. They are asked in 5 marks questions. You will also find 10 marks question asking to implement function using Decoder or MUX.

There will a long Question from this alongside multiplexer and decoder

This chapter is harder than previous and require a lot of attention at first. Heavy marks weightage comes from this chapter and Counters. \

Maybe the hardest topic. Only come to this chapter after you are comfortable with flip flops. State diagram, table and circuit is very important to understand so be very attentive. If you are just before exams, study up to Video number 12

This (will soon) contain the most asked questions from all chapters. Be sure to practice them before exams.